Karafan Journal

Karafan Journal

Presenting a method to reduce crosstalk in 3D on-chip networks using convolutional neural networks

Document Type : Original Article

Authors
1 Student of B.S in Computer Engineering, Department of Computer Engineering, Shahid Rajaee Teacher Training University, Tehran, Iran.
2 Associate Professor, Department of Computer Engineering, Shahid Rajaee Teacher Training University, Tehran, Iran.
Abstract
In this paper, the challenges of designing and implementing advanced processing circuits in multi‌core systems have been investigated. Traditional methods of dealing with crosstalk include coding techniques and the use of physical and transistor repeaters, which face limitations such as increased overhead and high complexity. To solve this problem, in this paper, a new approach based on artificial intelligence and deep learning is presented to improve efficiency and reduce crosstalk problems. Using convolutional neural network algorithms, the proposed algorithm is capable of removing inappropriate and harmful patterns in the data and improving the quality of the signals by analyzing and learning them. The results of the simulations show that the proposed method can identify and remove harmful patterns with high accuracy and efficiency, and ultimately lead to an increase in processing speed and a decrease in power consumption in chips. This approach not only improves the performance of processing circuits, but can be used as an effective solution in designing the new generation of multi‌core chips.
Keywords
Subjects

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Volume 22, Issue 1
Technical and Engineering
Spring 2025
Pages 105-126

  • Receive Date 28 October 2024
  • Revise Date 15 March 2025
  • Accept Date 26 April 2025